Tuyển dụng SoC Backend Implementation Engineer (Junior - Senior) làm việc tại HR1 Vietnam Holdings

Mức lương:

Lương thỏa thuận
Kinh nghiệm:

Từ 2 Năm
Hình Thức:

Cố định
Cấp bậc:

Nhân viên
Lĩnh vực:

FrontEnd/ BackEnd/ Fullstack/ Web Developer
Nơi Làm Việc:

Hà Nội

Mô tả công việc

Responsible for all aspects of the SoC physical design flow including but not limited to: floor-planning, place and route, timing and power, physical verification, and full chip design database ready for manufacturing.

Work with the FE team to understand chip architecture and dependencies between different domains then drive physical aspects early in design cycle.
Responsible for full chip physical design both flat and hierarchical.
Create full chip floor plan including pin placement, partitions and power grid.
Develop and validate high performance low power clock network guidelines.
Perform block level place, route and close the design to meet timing, area and power constraints.
Generate and implement ECOs to fix timing, noise and EM IR violations.
Run Physical design verification flow at chip/block level and come up with guidelines and checklist, execute and track progress.
Work with expert team to identify potential solution, drive execution and improvement in PD work methodologies.
Manage, assist, resolve technical issues related to PD work with team members.
Work with counterparts in other sites to jointly execute projects as an integral part of the team in global environment.
Support project managers with effort estimations and resource planning.
Support team leader in coaching, training and development team members.

Yêu cầu công việc

University and above, majoring in Electrical and Electronics, Computer science.
2+ years of experience in Physical Design.
Experience in low power/multi-voltage design and understanding of UPF.
Worked on multiple tape-outs at ultra-deep sub-micron technologies, 28nm and smaller nodes, in complex multi-million gate designs.
Deep knowledge of Synopsys or Cadence implementation tools and flow.
Have hands-on experience in completing RTL to GDSII flow, which includes synthesis, DFT, IO planning, floor-planning, power analysis, P&R, CTS, extraction, timing closure, physical verification, rail analysis etc.,
Strong technical knowledge in microelectronics and/or system architectures.
Knowledge on package design, ESD, integration of analog and mixed signal macros.
Excellent debugging skills for design issues.
Experience in using Perl and TCL/TK to achieve highly automated, reproducible and fast results.
Good communication and interpersonal skills.
Good at English.
Logical thinking.
Research and apply new technology.
Analytic and troubleshoot problems.
Careful, ability to multi-task and can work under deadline pressure.

Ứng tuyển

HR1 Vietnam Holdings

Quy mô công ty:

100 - 499
Địa chỉ:

12th Floor HDTC BUILDING, 36 Bui Thi Xuan Str., Ben Thanh Ward, Dist.1, HCM City, Hồ Chí Minh
Website:

www.hr1vietnam.com

HR1Vietnam Holdings has over 10 years of experience and has been nationally well-known as the Leading professional recruitment Firm and trusted in the market.

HR1Vietnam Holdings with more than 200 professional consultants nationwide, specializes in recruiting professionals in different positions for multiple organizations around Vietnam and APAC, connects with highly qualified Candidates for specialists, mid to senior level and executive level positions.

HR1Vietnam Holdings is a one-stop dynamic HR services provider to support our Clients on every step of their way to grow.

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