Benefits

  • Annual salary and performance reviews

  • Free daily lunches

  • Full social insurance + Premium healthcare, Premium individual insurance

  • 15+ Annual leaves

  • Work with Global teams across multiple countries

  • Standardized international working processes + Professional training programs for both freshers and high level

  • Flexible work hours 40 hours/week, work-from-home policy

Job Description

  • Lead IO,Bump,RDL design from Chip Backend design viewpoint.
  • Negotiate and collaborate with other departments which do Package Design and IO assignment.
  • Assign signal and PG to BUMP.
  • Place IO, analogP
  • HY with BUMP, which is connected to BUMP.
  • Analog macro/PHY placement with considering PnR.
  • RDL design (routing and solve IRdrop/EM)
  • ESD cell placement and PG wiring.
  • Make ESD network and Chip ESD implement report document to review and get approval with expert
  • Minimize dead space by analog macros/PHY.
  • PKG PG consideration. (connect some PG BUMP with considering analog characteristic.)
  • Analog signal/PG, Digital PG implementation.
  • Human management and build engagement with team.
  • Collaborate with related teams to finish design within definited schedule.

 

Location: Distric 7, HCM city

 

Working Form: Hybrid

Job Requirement

  • 10+ years experience in PG design, PG implementation, both Analog and digital.
  • Solid knowledge in EDA tools (Layout tool, Physical Verification tool, ...)
  • Good written and oral comunication in English & interpersonal skills.
  • Experience in scripting languages of Tcl. In addtional, recommended such as C-Shell, Perl, Awk, Phython, and so on.
  • Understanding and experienced in PERC (Programmable Electrical Rule Checking) verification is a plus
  • Experience in human engagement and building team.
  • Good communication skills as well as problem solving skills.
  • Long-term working commitment.

HR1TECH

  • Company size:
    100 - 499
  • Your address:
    Hồ Chí Minh
  • Website:
    https://hr1tech.com/

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