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Job Description

IP design, verification and implementation

 

  • Make specification, implement the design in Verilog
  • Perform UT and CT verification.
  • Perform synthesis and checkers (includes Syntax, Equivalence, CDC, STA checking)
  • Release module SDC and perform timing check.

Job Requirement

  •  Have experience on some peripheral IPs such as DMAC, Interrupt controller (ARM GIC), MMU
  • Good experience in digital design flow including: RTL coding, RTL simulation, logic synthesis, timing constraint, STA, equivalence checking, asynchronous design
  • Knowledge about AMBA protocol: AHB, APB, AXI is a must.
  • Basic knowledge of Formal verification, SVA, TCL.
  • Have knowledge about assembly, C/C++, Verilog languages.
  • Knowledge about SystemVerilog and UVM is a plus.
  • Knowledge about Functional Safety, ISO26262 is a plus
  • Provide transparent information, be agile in daily operations.
  • Communicate fluently with teams and customers with a global mindset.
  • Be innovative with excellent ideas in design and/or work-process optimization.
  • Manage daily work, lead design team as an owner
Apply now
HR1TECH

HR1TECH

  • Company size:
    100 - 499
  • Your address:
    Hồ Chí Minh
  • Website:
    https://hr1tech.com/

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